The present disclosure is directed to semiconductor devices and methods for fabricating the same, and more particularly, to semiconductor devices including input/output transistors with improved reliability and methods for fabricating the same.
With each succeeding generation of integrated circuits, device dimensions are reduced to provide higher degrees of integration and improved performance. In particular, a driving current of an electric device such as a MOS transistor may increase as a gate insulating layer thickness is minimized. Thus, the gate insulating layer may be formed to have fewer defects as well as better reliability for improving device performance.
A thermal oxide layer such as a silicon oxide layer has been previously used as the gate insulating layer, because a thermal silicon oxide layer has a stable interface with a silicon substrate and can be easily formed.
Since silicon oxide has a low dielectric constant of about 3.9, there are limitations to reducing its thickness, as reducing the thickness of a silicon oxide layer can cause a leakage current through the silicon oxide layer used as a gate insulating layer.
Other mono metal oxide layers, such as a hafnium oxide layer and a zirconium oxide layer, other metal silicates, such as hafnium silicate and zirconium silicate, and other aluminates, such as hafnium aluminum oxide, can provide improved device performance even if the layers are thicker than a silicon oxide layer, thus high-k dielectric materials have been considered for use as a gate insulating layer.